Jetway 915GCP user manual download

For Devices:Jetway 915GCP   and 1 more
Languages:English
Pages:53
You can view the full version and download it in PDF format.
Page 35 of 53
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Anti-Virus Protection
Allows you to choose the VIRUS Warning feature for IDE Hard Disk boot sector protection.
If this function is enabled and someone attempt to write data into this area, BIOS will show a
warning message on screen and alarm beep.
Disabled
(default) No warning message to appear when anything attempts to access the
boot sector or hard disk partition table.
Enabled
Activates automatically when the system boots up causing a warning
message to appear when anything attempts to access the boot sector of
hard disk partition table.
CPU Internal Cache
The default value is Enabled.
Enabled
(default)
Enable cache
Disabled
Disable cache
Note:
The internal cache is built in the processor.
External Cache
Choose Enabled or Disabled.
This option enables the Level 2 cache memory.
CPU L2 Cache ECC Checking
Choose Enabled or Disabled.
This option enables the Level 2 cache memory ECC (error
check correction).
Quick Power On Self Test
This category speeds up Power On Self Test (POST) after you power on the computer.
If this
is set to Enabled.
BIOS will shorten or skip some check items during POST.
Enabled
(default)
Enable quick POST
Disabled
Normal POST
First/Second/Third/Fourth Boot Device
The BIOS attempts to load the operating system from the devices in the sequence selected in
these items.
The settings are Floppy, LS/ZIP, HDD-0/HDD-1/HDD-3, SCSI, CDROM, LAD
and Disabled.
Swap Floppy Drive
Switches the floppy disk drives between being designated as A and B.
Default is Disabled.
Boot Up Floppy Seek
During POST, BIOS will determine if the floppy disk drive installed is 40 or 80 tracks.
360K
type is 40 tracks while 760K, 1.2M and 1.44M are all 80 tracks.
Boot Up NumLock Status
The default value is On.
On
(default)
Keypad is numeric keys.
Off
Keypad is arrow keys.
Gate A20 Option
Normal
The A20 signal is controlled by keyboard controller or chipset hardware.
Fast
(default)
The A20 signal is controlled by port 92 or chipset specific method.
Sample