J&W JW-IP35-S user manual download (Page 28 of 45)

Languages: English
Pages:45
You can view the full version and download it in PDF format.
Page 28 of 45
- 2´ -
P3 Series
User's Manual
4.5.5 Advanced Chipset Features
Phoenix - AwardBIOS CMOS Setup Utility
Advanced Chipset Features
System BIOS Cacheable
Memory Hole At 15M-16M
PCI Express Root Port Func
** VGA Setting **
PEG Force x1
On-Chip Frame Buffer Size
DVMT Mode
DVMT/FIXED Memroy Size
[
]
[Disabled]
[Press Enter]
[Disabled]
[
8MB]
[DVMT]
[128MB]
Item Help
Menu Level
↑↓
→←
:Move Enter:Select
+/-/PU/PD:Value
F10:Save
ESC:Exit
F1:General Help
F5: Previous Values
F6: Fail-Safe Defaults
F7: Optimized Defaults
Enabled
System BIOS Cacheable
Available options: [Enabled],[Disabled]
Memory Hole At 15M-16M
You can reserve this area of system memory for ISA adapter ROM. When this area is
reserved, it cannot be cached. The user information of peripherals that need to use
this area of system memory usually discusses their memory requirements.
PCI Express Root Port Func
Click <Enter> key to enter its submenu:
Phoenix - AwardBIOS CMOS Setup Utility
PCI Express Root Port Func
PCI Express Port 1(PCIE1)
X PCI Express Port 2
X PCI Express Port 3
X PCI Express Port 4
PCI Express Port 5
PCI Express Port 6
PCI-E Compliancy Mode
[
]
Disabled
Disabled
Disabled
[Enabled]
[Enabled]
[v1.0a]
Item Help
Menu Level
►►
↑↓
→←
:Move Enter:Select
+/-/PU/PD:Value
F10:Save
ESC:Exit
F1:General Help
F5: Previous Values
F6: Fail-Safe Defaults
F7: Optimized Defaults
Auto(4x)
PCI Express Slot 1 ~ PCI Express Slot 4
This option enables or disables the PCI Express port function.
PCI-E Compliancy Mode
This item selects the mode for PCI Express add-on card.
Sample
This manual is suitable for devices