SONY PCG-5K2T Electrical circuit download (Page 2 of 36)

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Manual type:Electrical circuit
Pages:36
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Page 2 of 36
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A
A
B
B
C
C
D
D
R_PCLK_Debug
R_PCLK_PCU
R_PCLK_ICH
PCIE_REQ3#
PCIE_REQ4#
PCIE_REQ2#
CPUBSEL0
R_CLK_PCIE_LAN#
R_CLK_PCIE_LAN
R_CLK_PCIE_ICH#
R_CLK_PCIE_ICH
R_CLK_PCIE_EXPRESS
CPU_BSEL2
R_PCLK_Debug
PCLK_Debug
PCLK_CardBus
R_PCLK_CardBus
R_PCLK_ICH
PCLK_ICH
R_CLK_PCIE_EXPRESS#
R_HCLK_MCH#
R_HCLK_CPU
R_HCLK_CPU#
R_HCLK_MCH
R_CLK_PCIE_VGA
R_CLK_PCIE_VGA#
R_DREFCLK
R_PCLK_PCU
PCLK_PCU
R_DREFCLK#
PCIE_REQ4#
CPUBSEL0
CLKUSB_48
CPU_BSEL1
R_48M
14M_ICH
R_14M_ICH
PCIE_REQ3#
R_CLK_PCIE_MINI
R_CLK_PCIE_MINI#
R_CLK_PCIE_SATA
R_CLK_PCIE_SATA#
R_CLK_PCIE_MCH#
R_CLK_PCIE_MCH
PCIE_REQ2#
363VREF
CLK8402_48
363VREF
PCLK_Debug
CLKUSB_48
PCLK_CardBus
14M_ICH
PCLK_PCU
PCLK_ICH
CLK8402_48
R_DREFSSCLK
R_DREFSSCLK#
CLK_VDD
VCC3
VCCP
VCC3
VCC3
VCC3
VCC3
CPUBSEL0
(3)
MCH_BSEL0
(5)
VGA_27MHZ
(32)
CLK_PCIE_MINI#
(17)
CLK_PCIE_MINI
(17)
CLK_PCIE_MCH#
(5)
CLK_PCIE_MCH
(5)
PCLK_CardBus
(23)
PCLK_Debug
(17)
PCIE_REQ4#
(5)
PCLK_ICH
(13)
PM_STPPCI#
(14)
PM_STPCPU#
(14)
CLKUSB_48
(14)
14M_ICH
(14)
DREFCLK
(5)
DREFCLK#
(5)
CLKEN
(14)
PCIE_REQ3#
(17)
PDAT_SMB
(11,14,16,17)
PCLK_SMB
(11,14,16,17)
DREFSSCLK#
(5)
DREFSSCLK
(5)
HCLK_MCH
(5)
HCLK_MCH#
(5)
HCLK_CPU#
(3)
HCLK_CPU
(3)
CLK_PCIE_VGA
(31)
CLK_PCIE_VGA#
(31)
VGA_27MHZ#
(32)
CLK_PCIE_EXPRESS#
(16)
CLK_PCIE_EXPRESS
(16)
PCLK_PCU
(18)
PCIE_REQ2#
(16)
CLK_PCIE_LAN#
(28)
CLK_PCIE_LAN
(28)
CLK8402_48
(23)
CLK_PCIE_SATA
(12)
CLK_PCIE_SATA#
(12)
CLK_PCIE_ICH
(13)
CLK_PCIE_ICH#
(13)
Title
Size
Document Number
Rev
Date:
Sheet
of
QUANTA
COMPUTER
1A
CLOCK GENERATOR
B
2
35
Wednesday, November 15, 2006
GD1 Main Board
Title
Size
Document Number
Rev
Date:
Sheet
of
QUANTA
COMPUTER
1A
CLOCK GENERATOR
B
2
35
Wednesday, November 15, 2006
GD1 Main Board
Title
Size
Document Number
Rev
Date:
Sheet
of
QUANTA
COMPUTER
1A
CLOCK GENERATOR
B
2
35
Wednesday, November 15, 2006
GD1 Main Board
2
1.Level 1 Environment-related Substances Should NEVER be Used.
2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners.
0824 Eric_Change 33ohm to 22ohm and add R72 PL
*
Internal pull up to VDD
**Internal pull down to GND
0824 Eric_check EVT MB
1003 Eric_delete test pad
Check level M64=1.2V; M72/74=1.8V
PCIE_REQ2#
PCIE_L0
PCIE_L8
PCIE_L6
PCIE_L2
PCIE_REQ3#
PCIE_L7
PCIE_REQ4#
PCIE_L5
PCIE_L4
PCIE_REQ1#
PCIE_L1
PCIE_L3
ITP_EN(PIN8)
LOW : PIN43/44 SRC
HIGH : PIN43,44 CPUITP
RP6
Signal
71.5
R2
R6
CLK_PCIE_VGA
22X2
965GM
RP5
965PM
NI
NI
22X2
NI
121
NI
PCIEX0
R494
R26
(NC)
(10K)
(10K)
(NC)
(10K)
(NC)
PIN 5
PIN 9
PIN 14/15
PIN 17/18
DOT96
HI
LO
LO
HI
DOT96
PCIEX0
HI
LO
PCIEX9
PCIEX9
LCD
27MHZ
R7
NI
22
VGA_27MHZ
DREFSSCLK
VGA_27MHZ#
DREFCLK
RP10
22X2
NI
BSEL1
BSEL2
0
0
0
CPU
BSEL0
0
1
1
1
1
0
1
1
0
0
0
0
0
0
1
1
266.66
1
1
1
1
0
100.00
333.33
166.66
200.00
133.33
PCI
100
SRC
*
400.00
DOT
48
USB
14.318
REF
33.33
100
100
100
100
96
48
14.318
33.33
100
100
33.33
96
48
14.318
33.33
96
14.318
33.33
96
48
14.318
48
14.318
33.33
96
48
14.318
96
48
14.318
33.33
96
FSC
FSB
FSA
96
48
%
Spread
33.33
100
200.00
0.5 Down
0.5 Down
0.5 Down
0.5 Down
0.5 Down
0.5 Down
0.5 Down
0.5 Down
1030 ADD L2
R559
12.1/F_4
R559
12.1/F_4
2
4
1
3
RP6
I@22X2
RP6
I@22X2
2
4
1
3
RP7
22X2
RP7
22X2
2
4
1
3
RP5
E@22X2
RP5
E@22X2
C13
1U/6.3V_6
C13
1U/6.3V_6
2
4
1
3
RP3
22X2
RP3
22X2
L14
0_6
L14
0_6
C81
*15P_4
C81
*15P_4
C11
0.1U_4
C11
0.1U_4
R15
22_4
R15
22_4
C15
10U/6.3V_8
C15
10U/6.3V_8
C18
*15P_4
C18
*15P_4
R29
1K/F_4
R29
1K/F_4
R19
22_4
R19
22_4
2
4
1
3
RP9
22X2
RP9
22X2
R12
220/F_4
R12
220/F_4
C4
10U/6.3V_8
C4
10U/6.3V_8
R8
2.2K/F_4
R8
2.2K/F_4
L1
0_6
L1
0_6
C80
0.1U_4
C80
0.1U_4
2
1
Y1
14.318MHZ/20pF/20PPM
Y1
14.318MHZ/20pF/20PPM
R72
10K_4
R72
10K_4
R18
22_4
R18
22_4
2
4
1
3
RP4
10X2
RP4
10X2
R24
10K_4
R24
10K_4
C17
*10P_4
C17
*10P_4
C3
0.1U_4
C3
0.1U_4
R575
10K_4
R575
10K_4
C1
30P
C1
30P
C19
*15P_4
C19
*15P_4
2
4
1
3
RP48
22X2
RP48
22X2
FSB/TEST_MODE
16
*SELLCD_27#/PCICLK_F5
9
GND
2
FSC/REF1/TEST_SEL
61
PCIET_L6
39
SDATA
55
FSA/USB_48MHZ
12
PCIEC_L1
20
SATACLKT_L
26
VDDA
45
PCIET_L5
36
CPUT_L1F
49
CPUC_L1F
48
REF0
60
GND
59
VDDREF
56
X2
57
**REQ_SEL/PCICLK0
64
PCI/PCIEX_STOP#
63
PCIEC_L9/DOTC_96MHZL
15
PCIET_L1
19
VDD48
11
CPUT_L0
52
ITP_EN/PCICLK_F4
8
X1
58
PCIEC_L2
23
GND
29
VDDPCIEX
42
SCLK
54
GND
53
CPUC_L0
51
VDDCPU
50
VREF
47
GNDA
46
PCIET_L9/DOTT_96MHZ
14
GND
13
27FIX/LCD_SSCGT/PCIET_L0
17
27SS/LCD_SSCGC/PCIEC_L0
18
VDDPCIEX
21
PCIET_L2
22
PCIET_L3
24
PCIEC_L3
25
SATACLKC_L
27
VDDPCIEX
28
PCIEC_L6
38
GND
37
PEREQ1#/PCIET_L7
41
PEREQ2#/PCIEC_L7
40
CPUITPT_L2/PCIET_L8
44
CPUITPC_L2/PCIEC_L8
43
PCIET_L4
30
PCIEC_L4
31
*PWRSAVE#
34
PCIEC_L5
35
*PEREQ4#
33
*PEREQ3#
32
VDDPCI
1
PCICLK1
3
PCICLK2
4
*SELPCIEX0_LCD#/PCICLK3
5
GND
6
VDDPC1
7
VTTPWR_GD/PD#
10
CPU_STOP#
62
U1
ICS9PR363BGLF
U1
ICS9PR363BGLF
C9
0.1U_4
C9
0.1U_4
C7
0.1U_4
C7
0.1U_4
R26
10K_4
R26
10K_4
C12
0.1U_4
C12
0.1U_4
R2
E@22_4
R2
E@22_4
R4
22_4
R4
22_4
C5
0.1U_4
C5
0.1U_4
C20
*15P_4
C20
*15P_4
2
4
1
3
RP1
10X2
RP1
10X2
2
4
1
3
RP10
I@22X2
RP10
I@22X2
R7
E@71.5/F_4
R7
E@71.5/F_4
R27
*1K_4
R27
*1K_4
C10
0.1U_4
C10
0.1U_4
R14
1K/F_4
R14
1K/F_4
C2
30P
C2
30P
C16
0.1U_4
C16
0.1U_4
R138
*1K_4
R138
*1K_4
C14
0.1U_4
C14
0.1U_4
R22
10K_4
R22
10K_4
R558
12.1/F_4
R558
12.1/F_4
R6
E@121/F_4
R6
E@121/F_4
2
4
1
3
RP8
22X2
RP8
22X2
R25
10K_4
R25
10K_4
R256
0_4
R256
0_4
R3
10K_4
R3
10K_4
R23
10K_4
R23
10K_4
C21
*15P_4
C21
*15P_4
2
4
1
3
RP2
22X2
RP2
22X2
R21
10K_4
R21
10K_4
R17
22_4
R17
22_4
C22
*15P_4
C22
*15P_4
Sample
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